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Lazy queueing and direct process switch — merit or myths?

Authors

Kevin Elphinstone, David Greenaway and Sergio Ruocco

NICTA

UNSW

Nomadis Lab.
DISCo
Università di Milano-Bicocca Milano
Italy

Abstract

The L4 microkernel, like many first and second generation microkernels, was designed to maximise best-effort performance. One component of its functionality critical to overall system performance is its interprocess communication primitive. L4 uses two techniques to minimise communication costs: direct process switching and lazy queue management. These techniques improve performance at the expense of real-time predictability of the scheduler. Now that L4 is being adopted in the embedded space, which features real-time requirements, we must determine if there is continued merit in using the optimisations. In this paper we quantitatively analyse the two optimisations using different kernel implementations and measure the performance improvements of the optimisations directly, and indirectly using the Re-aim benchmark suite. We find that the system-level performance improvements are marginal for this Unix-like workload.

BibTeX Entry

  @inproceedings{Elphinstone_GR_07,
    publisher        = {NICTA, Australia},
    author           = {Elphinstone, Kevin and Greenaway, David and Ruocco, Sergio},
    issn             = {1833-9646},
    month            = dec,
    year             = {2007},
    title            = {Lazy queueing and direct process switch — merit or myths? },
    booktitle        = {Workshop on Operating System Platforms for Embedded Real-Time Applications (OSPERT)},
    pages            = {69-77},
    address          = {Pisa, Italy}
  }

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