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Prevention of microarchitectural covert channels on an open-source 64-bit RISC-V core

Authors

Nils Wistoff, Moritz Schneider, Frank Gürkaynak, Luca Benini and Gernot Heiser

DATA61

ETH Zurich

UNSW Sydney

Abstract

Covert channels enable information leakage across security bound- aries of the operating system. Microarchitectural covert channels exploit changes in execution timing resulting from competing access to limited hardware resources. We use the recent experimental support for time protection, aimed at preventing covert channels, in the seL4 microkernel and evaluate the efficacy of the mechanisms against five known channels. We confirm that without hardware support, these defences are expensive and incomplete. We show that the addition of a simple instruction that flushes microarchitectural state can enable the OS to close all five evaluated covert channels, with low increase in context switch costs and negligible hardware overhead. We conclude that such a mechanism is essential for security.

BibTeX Entry

  @inproceedings{Wistoff_SGBH_20,
    author           = {Wistoff, Nils and Schneider, Moritz and G\"{u}rkaynak, Frank and Benini, Luca and Heiser, Gernot},
    month            = may,
    date             = {2020-5-29},
    year             = {2020},
    keywords         = {covert channels timing channels},
    title            = {Prevention of Microarchitectural Covert Channels on an Open-Source 64-bit {RISC}-{V} Core},
    address          = {Valencia, Spain},
    numpages         = {7},
    video            = {https://carrv.github.io/2020/videos/CARRV_10_Wistoff.html},
    booktitle        = {Workshop on Computer Architecture Research with RISC-V (CARRV)},
    paperurl         = {https://ts.data61.csiro.au/publications/csiro_full_text//Wistoff_SGBH_20.pdf},
    publisher        = {ACM}
  }

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