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Hira Taqdees Syeda
Proof Engineer

Research Interests

Hira has just finished a PhD working on developing a Unified Memory Model for kernel verification. Her interests include interactive theorem proving, software verification and embedded systems.

Contact Details

Email:Hira.Syeda@data61.csiro.au

More contact information is available at the Contact page.

Photo of Hira Taqdees Syeda

Publication List

Projects

Past

Qualifications

Hira holds a Masters in Electrical Engineering from National University of Sciences and Technology (NUST), Pakistan.

Publications

Data61 Papers

2019

Abstract to be published Hira Taqdees Syeda
Low-level program verification under cached address translation
PhD Thesis, UNSW, Sydney, Australia, August, 2019

2018

Abstract PDF Hira Taqdees Syeda and Gerwin Klein
Program verification in the presence of cached address translation
International Conference on Interactive Theorem Proving, pp. 542-559, Oxford, UK, July, 2018

2017

Abstract PDF Hira Taqdees Syeda and Gerwin Klein
Reasoning about translation lookaside buffers
Proceedings of the 21st International Conference on Logic for Programming, Artificial Intelligence and Reasoning, pp. 490–508, Maun, Botswana, May, 2017