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A comparison of address translation mechanisms for virtually-addressed caches in embedded systems

Authors

Harvey Tuch

    School of Computer Science and Engineering
    UNSW,
    Sydney 2052, Australia

Abstract

Virtual memory is a runtime abstraction that allows for more secure, robust and easier to develop software. Virtual memory may be used on embedded systems to reduce costs of development and improve the reliability of systems. However, virtual memory has both time and energy overheads. Virtually-addressed caches offer a means of potentially reducing these.

In this thesis, one component of virtual memory, address translation, is explored on virtually-addressed caches, in the context of embedded systems. A detailed survey of the literature is presented, and an experimental approach is utilised to quantitatively compare the options available for address translation on virtually-addressed caches, with the goal of characterising the mechanism that provides the lowest energy and time overheads.

BibTeX Entry

  @mastersthesis{Tuch:be,
    school           = {School of Computer Science and Engineering},
    author           = {Harvey Tuch},
    title            = {A Comparison of Address Translation Mechanisms for Virtually-Addressed Caches in Embedded Systems},
    month            = nov,
    note             = {Available from publications page at \url{http://ts.data61.csiro.au/}},
    year             = {2002},
    keywords         = {In-cache address translation, virtually-addressed caches, TLB, trace-driven simulation},
    address          = {Sydney, Australia}
  }

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