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Legba: Fast hardware support for fine-grained protection

Authors

Adam Wiggins, Simon Winwood, Harvey Tuch and Gernot Heiser

    School of Computer Science and Engineering
    UNSW,
    Sydney 2052, Australia

Abstract

Fine-grained hardware protection, if it can be done without slowing down the processor, could deliver significant benefits to software, enabling the implementation of strongly encapsulated light-weight objects. In this paper we introduce Legba, a new caching architecture that aims at supporting fine-grained memory protection and protected procedure calls without slowing down the processor's clock speed.

This is achieved by separating translation from protection, which allows the use of virtually-addressed caches and moving the TLB off-core. Protection is implemented in two stages. We add protection information in the form of an object ID to each cache line. This object ID is combined with a per-protection context identifier, and the result is used to index into a protection cache, which delivers the access rights. As no range check is required on the protection cache, it can be set-associative, allowing it to be made large, fast and low-power, compared to a fully associative TLB. On a cache miss, the object ID is retrieved in parallel to the cache line fetch, performing the protection range check off-core.

A new switch permission enables Legba to implement protected procedure calls, where the new context identifier is taken from the instruction cache line's object ID. This mechanism is similar to call gates but more flexible. The paper compares Legba with approaches based on the idea of a protection look-aside buffer, in particular with respect to coverage.

BibTeX Entry

  @inproceedings{Wiggins_WTH_03,
    publisher        = {Springer},
    author           = {Adam Wiggins and Simon Winwood and Harvey Tuch and Gernot Heiser},
    title            = {Legba: Fast Hardware Support for Fine-Grained Protection},
    month            = sep,
    year             = {2003},
    booktitle        = {Proceedings of the 8th Asia-Pacific Computer Systems Architecture Conference},
    address          = {Aizu-Wakamatsu City, Japan}
  }

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