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Inside L4/MIPS: Anatomy of a high-performance microkernel

Authors

Gernot Heiser

    School of Computer Science and Engineering
    UNSW,
    Sydney 2052, Australia

Abstract

This document is an attempt to document the internal structure of L4 and its operations. It is based on the L4 implementation for the MIPS R4x00 (L4/MIPS), kernel version 79 (February 1999). The document is meant as an aid in teaching operating systems internals, and as a guide for kernel implementors. While the actual code discussed is very specific to the MIPS processor, much of the overall structure and logic of L4 is quite uniform across platforms. The present version of this report documents L4/MIPS data structures, exception handling and the IPC system call. Documentation of the implementation of the other system calls, and issues such as scheduling, will be added in the near future.

BibTeX Entry

  @manual{Heiser:IL4,
    oldlabel         = {Heiser:IL4a},
    oldnote          = {Available from \url{http://www.disy.cse.unsw.edu.au/Software/L4}},
    title            = {Inside {L4/MIPS}: Anatomy of a High-Performance Microkernel},
    author           = {Gernot Heiser},
    month            = jan,
    year             = {2001},
    organization     = {School of Computer Science and Engineering},
    address          = {Sydney, Australia}
  }

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