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Pleb power

The University of New South Wales

PLEB 2 power measurement

PLEB 2 was developed (among other reasons) for conducting research into power management. As such, it has instrumented power supplies, which allow the CPU, memory and IO power to be measured independently.

An on-board microcontroller provides debugging access via JTAG, reset capabilities and power monitoring.

PLEB 2 top picture

The CPU, memory and IO power supplies are generated independently. The CPU supply is scalable from 0.8V to 1.5V. The memory and IO supplies are both 3.3V. Each of these power supplies is instrumented with a low-value sense resistor and an amplifier. An analogue to digital converter (ADC) in the on-board microcontroller records the values. The microcontroller can give this information back to the XScale via I2C. The ADC can sample at up to 15kHz.

PLEB 2 Sensors Schema

Served by Apache on Linux on seL4.
Served by Apache on Linux on seL4.